MSPM0C1104SDGS20R MSPM0C1104SDGS20R – 24-MHz M0+ MCU with full GPIO & ADC density in VSSOP-20

  • VSSOP-20 = best I/O density in a small outline — practical room for PWM, serial, and multi-channel ADC.
  • High-speed 12-bit ADC suitable for fast sampling and control loops.
  • Protocol-rich serial (UART/I²C/SPI) in a budget MCU for easy peripheral hookup.

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Texas Instruments MSPM0C1104SDGS20R Microcontroller (VSSOP-20) Overview

MSPM0C1104SDGS20R is the 20-pin VSSOP (DGS) variant of TI’s MSPM0C1104, delivering the same 24-MHz Arm® Cortex®-M0+ core and mixed-signal capability as the rest of the family, but with more exposed GPIO and analog channels than the tiny 8-pin / 16-pin options. The result is a compact controller that still handles multiple PWMs, UART/I²C/SPI, and multi-channel sensing without moving up to a much larger footprint. It’s listed as ACTIVE, industrial-rated –40 to +125 °C, and tuned for cost-optimized control where board space, power, and BOM remain tight.

Family-level capabilities include a trimmed SYSOSC at 24 MHz (with frequency-locked control, ~±1.2% typical) and a 12-bit ADC up to 1.5 Msps. You can use VDD as reference for quick integration or select internal 1.4 V / 2.5 V references for improved measurement stability—ideal for sensor front-ends, current/voltage monitoring, or closed-loop control.

Highlights

  • I/O headroom in a small outline: VSSOP-20 exposes far more GPIO/ADC/PWM than 8-pin/16-pin packages, enabling richer boards without a size penalty.

  • Credible mixed-signal: 12-bit ADC (to 1.5 Msps) with flexible references for precision or range, plus timers that scale to multi-channel PWM.

  • Right-sized performance: 24-MHz M0+, 16KB Flash / 1KB SRAM—enough for drivers, RT loops, and protocol stacks in a lean image.

  • Protocol-ready: UART + I²C (FM+) + SPI (≤12 Mbps) cover mainstream sensors, expanders, and radios.

  • Low-power DNA: Typical 87 µA/MHz run, ~5 µA standby, ~200 nA shutdown for coin-cell or energy-harvested designs.

  • 5-V tolerant OD pins (x2): convenient level interface for legacy inputs or open-drain signaling.

  • Scalable family: reuse firmware across MSPM0C110x packages when you need even more pins later.

Specifications

Parameter Value
CPU Arm Cortex-M0+ @ 24 MHz (high-accuracy SYSOSC)
Flash / SRAM 16KB / 1KB
ADC 12-bit, up to 1.5 Msps; up to 10 external inputs (device family)
Interfaces 1× UART, 1× I²C (FM+), 1× SPI (≤12 Mbps)
Timers / PWM 3 timers, up to 14 PWM channels (family)
GPIO Up to 18 GPIO; two 5-V tolerant open-drain pins (VSSOP exposes many)
Supply / Temp 1.62–3.6 V; –40 °C to 125 °C
Low-power modes RUN ~87 µA/MHz; STANDBY ~5 µA; SHUTDOWN ~200 nA
Package 20-pin VSSOP (DGS) – orderable SDGS20R
Base Product Number MSPM0C1104

Applications

  • Compact PLC / IO modules & simple HMI — extra GPIO/PWM for indicators, relays, and knob/keys while staying in VSSOP.

  • Multi-sensor pods & small data loggers — ADC channels and I²C/SPI for mixed analog/digital sensing.

  • Access control nodes, small drives, lighting — timers + PWM for motors/LEDs; UART for readers or radios.

  • Utility monitors — voltage/current taps, temperature/pressure channels, or low-cost condition logging.

  • Consumer accessories — compact wearables, handheld add-ons, or appliance sub-boards needing real I/O.

Pin & board-level notes

  • Plan the buses first: choose I²C or SPI as your main sensor backbone; reserve UART for debug or a comms module.

  • Leverage the two 5-V tolerant OD pins for interfacing to open-collector signals or legacy 5-V domains.

  • ADC practice: short analog routes, solid ground return, decouple VREF (if pinned out), and separate high-di/dt loads from analog nodes.

  • PWM drive: timers readily handle LED dimming, fan control, or small motor/buzzer outputs.

  • Clocking: trimmed SYSOSC often removes the need for a crystal unless your protocol/timing budget demands it.

Power strategy

  • Event-driven firmware: spend time in STANDBY and wake on GPIO/RTC/ADC thresholds.

  • Shipping/storage: use SHUTDOWN (~200 nA) to protect coin-cell shelf life.

  • Run current budgeting: ~87 µA/MHz helps estimate peak draw (e.g., ~2.1 mA @ 24 MHz minus peripherals).

Development & production

  • Software: MSPM0 drivers/examples speed bring-up; start with a serial template, then layer ADC/PWM.

  • Testability: keep a 3-4 pin test header (VCC/GND/UART or SWD) for programming and automated go/no-go.

  • Scalability: if rev-B needs more pins, migrate within MSPM0C110x with minimal code changes.

Conclusion

Texas Instruments MSPM0C1104SDGS20R balances footprint, I/O richness, and mixed-signal performance. If the 8-pin is too tight but QFN feels excessive, this VSSOP-20 orderable is the sweet spot—enough GPIO/ADC/PWM and all three serial interfaces, without blowing up your PCB or budget.

Specification: MSPM0C1104SDGS20R – 24-MHz M0+ MCU with full GPIO & ADC density in VSSOP-20

Brand

Xilinx / AMD

IC Type

Field-Programmable Gate Array

MSPM0C1104SDGS20R – 24-MHz M0+ MCU with full GPIO & ADC density in VSSOP-20
MSPM0C1104SDGS20R – 24-MHz M0+ MCU with full GPIO & ADC density in VSSOP-20
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