ESP32-C3 ESPRESSIF ESP32-C3 Wi-Fi & Bluetooth LE SoC 2.4 GHz 802.11 b/g/n + Bluetooth 5 LE, RISC-V @160 MHz

ESP32-C3 Overview — Low-Power RISC-V IoT SoC with Wi-Fi & BLE

ESPRESSIF’s ESP32-C3 is a highly-integrated, ultra-low-power wireless microcontroller designed to make Wi-Fi + Bluetooth® Low Energy products smaller, simpler, and more secure. At its heart is a single-core 32-bit RISC-V CPU clocked up to 160 MHz, paired with on-chip memory and a complete 2.4 GHz radio subsystem supporting IEEE 802.11 b/g/n (1T1R, up to 150 Mbps) and Bluetooth 5 LE including 125 kbps/500 kbps coded PHY for long-range links. A built-in USB Serial/JTAG controller streamlines programming and debugging without extra converters, while hardware crypto (AES-128/256, SHA, RSA, HMAC, true RNG) plus secure boot and transparent flash encryption provide production-grade security.

The ESP32-C3 family ships in a compact QFN32 (5×5 mm) package and is available as a bare-die SoC or with in-package 4 MB flash (ESP32-C3FH4 / C3FH4AZ). Developers can tap 22 programmable GPIOs (16 on AZ variant) with flexible IO-muxing, two 12-bit ADCs (up to 6 channels total), SPI/I²C/I²S/UART, LED-PWM, RMT infrared, TWAI® (CAN 2.0), GDMA, and timers. Deep-sleep current is spec’d at ~5 µA, with power modes covering Active, Modem-sleep, Light-sleep, and Deep-sleep to match your battery profile. The functional block diagram clearly outlines the RF, CPU, memory, security engines, and peripherals working together under the PMU.

Whether you are building smart locks, meters, portable medical devices, sensors, data loggers, or audio accessories, the ESP32-C3 delivers a dependable mix of performance, connectivity, and security in an affordable footprint—with a mature ESP-IDF software stack and USB-based flashing out of the box.

ESP32-C3 Specifications

Applications

The ESP32-C3’s combination of 2.4 GHz Wi-Fi, robust Bluetooth LE 5 stack, USB programming, and deep security makes it a natural fit across consumer, industrial, and commercial segments:

• Smart Home & Building – Wi-Fi sensors/actuators, smart locks, thermostats, light switches, plug modules, blinds/rollers, occupancy/air-quality monitors, Wi-Fi/BLE bridges. With STA+AP and 4 virtual interfaces, it can run a local AP for provisioning while staying connected to your infrastructure.

• Industrial & Instrumentation – Wireless data-acquisition nodes, CAN-connected gateways via TWAI®, barcode/POS peripherals, environment/condition monitors, asset trackers that leverage coded-PHY BLE for extended range on factory floors.

• Healthcare & Wearables – Battery-powered BLE peripherals, medical monitors, and companion devices taking advantage of Light-sleep/Deep-sleep, the on-chip temperature sensor, and USB-based service/debug.

• Consumer IoT & Audio – BLE audio remotes, LED lighting controllers with 6-channel fade-capable PWM, IR blasters using RMT, and Wi-Fi audio endpoints via I²S to external codecs.

• Agriculture & Environment – Long-range BLE sensing (125 kbps) for barns/greenhouses, Wi-Fi for backhaul, low-µA Deep-sleep for battery/energy-harvesting nodes, and ADC inputs for soil moisture or analog probes.

• Data Loggers & Sensor Hubs – RTC-retained state in Deep-sleep, secure flash encryption for tamper-resistant logs, and hardware crypto offload for TLS sessions over Wi-Fi.

(These align with the datasheet’s suggested sectors such as Smart Home, Industrial Automation, Health Care, Consumer Electronics, Agriculture, POS, Robotics, Audio, Sensor Hubs, and Data Loggers.)

Why ESP32-C3 for Your Next Design

1) Secure by design
A hardware root of trust (secure boot), XTS-AES flash encryption with software-inaccessible keys, HMAC/digital-signature engines, and a World Controller that hard-separates secure vs. general domains help you ship safe firmware at scale without external secure elements. Crypto offload reduces handshake and OTA overheads to save energy.

2) Developer-friendly workflow
The integrated USB-Serial/JTAG controller eliminates extra UART-to-USB dongles and external JTAG adapters for most tasks. Plug a single cable to power, flash, and debug (CDC-ACM + JTAG). With flexible IO-matrix routing, you can place peripherals where PCB routing is easiest. ESP-IDF offers mature Wi-Fi/BLE stacks, TLS, OTA, FreeRTOS integration, and abundant examples.

3) Balanced performance & power
Up to 160 MHz RISC-V and 150 Mbps Wi-Fi in Active mode, but sub-milliamp Modem-sleep and ~5 µA Deep-sleep with RTC state retained for long battery life. Fine-grained PMU control (CPU/RF/peripheral domains) lets you dial-in the right mix of latency vs. savings.

Design Notes & Integration Tips

• Pin planning: Review the pin-mux and “restrictions for GPIOs.” Flash pins (CLK/CS/DI/DO/WP/HOLD) and strapping pins (GPIO2/8/9) are critical—avoid conflicts. USB uses GPIO18/19; if you disable USB to reclaim them as GPIOs, configure pulls appropriately. The consolidated pin overview appendix (datasheet p.56) is a handy one-page map for schematics/layout.

• RF layout: The 2.4 GHz front-end (PA/LNA/balun and T/R switch) is integrated, but treat the antenna feed with standard RF layout practice (short, matched, keep-out ground clearances). Antenna diversity is supported via an external RF switch under GPIO control when needed.

• Power rail sequencing: After applying 3.3 V, hold CHIP_EN low until rails are stable; then release high (see timing tSTBL/tRST). This helps reliable boot and consistent strapping latches.

• Thermal & reliability: Most variants are rated to +105 °C ambient and pass JEDEC reliability tests (HTOL, ESD HBM/CDM, latch-up, TCT, uHAST, HTSL/LTSL). For new designs, choose current, non-NRND ordering codes (e.g., ESP32-C3FH4).

Three Quick Highlights

• RISC-V + security combo: 160 MHz RISC-V with AES/SHA/RSA/HMAC/TRNG, secure boot, and encrypted flash—security without extra chips.

• Native USB for dev-speed: Built-in USB-Serial/JTAG simplifies flashing/debug and reduces BOM/cabling.

• IoT-ready power modes: Modem-sleep, Light-sleep, and ~5 µA Deep-sleep—perfect for battery IoT nodes that still need Wi-Fi/BLE.

Summary

The ESP32-C3 organizes its logic into three power domains—RTC, digital, and analog—with sub-domains that the PMU can independently gate. In Active mode, CPU, RF, and peripherals run full-tilt, supporting high-throughput Wi-Fi (up to 40 MHz channels with HT40) and concurrent BLE operations. Modem-sleep clocks down the RF when traffic is idle while leaving the CPU active; Light-sleep pauses CPU and selected peripherals but can wake on MAC events, RTC, or external interrupts; Deep-sleep preserves RTC memory and timers while slashing current to the single-digit microamp range. This allows devices to wake periodically for quick uploads, then return to long-term hibernation—ideal for battery sensors or e-paper displays.

On the wired-peripheral side, a matrixed IO-mux means almost any peripheral signal can be routed to practical pins—handy when you’re escaping the 5×5 mm QFN. SPI2 can hit 80 MHz as a master for fast external devices, while I²S supports standard/TDM/PCM/PDM modes at up to 40 MHz BCK for streaming audio to codecs or MEMS PDM microphones (via format conversion). The GDMA controller provides three TX and three RX channels with linked-list descriptors, feeding SPI/I²S/AES/SHA/ADC/UART to offload the CPU during bursts. LED PWM features six channels with 18-bit duty-cycle precision and built-in fade hardware for smooth color gradients in lighting UX. RMT handles both IR transmit and receive with precise waveform programming—perfect for universal remotes, RGB LED protocols, or single-wire timing buses.

Wireless performance is anchored by a fully integrated 2.4 GHz RF path with PA/LNA, balun, and calibration algorithms for linearity, leakage, and I/Q balance. Typical Wi-Fi TX power reaches +21 dBm on 802.11b and +18.5 dBm at MCS7, while BLE can output up to +20 dBm—plenty for robust links. On the RX side, sensitivities and adjacent-channel rejection meet or exceed the standard limits across rates, and BLE sensitivity extends down to −105 dBm at the 125 kbps coded PHY for long-range operation.

Security is comprehensive: secure boot validates firmware signatures (RSA-PSS), flash encryption protects code/data at rest, and hardware AES/SHA/RSA plus HMAC and Digital Signature blocks accelerate TLS and identity. The World Controller splits resources into secure vs. general worlds to reduce attack surface in complex applications. eFuse stores keys/IDs, while the true RNG seeds cryptographic operations. These features, combined with ESP-IDF’s production-hardened networking stacks (WPA2/3 Enterprise, TLS 1.0–1.2), make the ESP32-C3 a trusted base for connected devices.

Finally, the USB Serial/JTAG block is a major productivity win. In development and manufacturing, it lets you power, flash, log, and JTAG-debug through a single cable; it also supports ROM print routing and download boot over USB for smooth bring-up. If your end product doesn’t expose USB, those pins can be remapped as GPIO when the USB block is disabled.

Ordering & Variants (at a glance)

• ESP32-C3 — Base SoC (no in-package flash), –40 °C to +105 °C.

• ESP32-C3FH4 — 4 MB in-package flash, –40 °C to +105 °C.

• ESP32-C3FH4AZ — 4 MB in-package flash, –40 °C to +105 °C, 16 bonded GPIOs (flash pins not brought out).

• ESP32-C3FN4 (NRND) — 4 MB in-package flash, –40 °C to +85 °C; not recommended for new designs.

Tip: For new designs, prefer ESP32-C3FH4 or discrete-flash ESP32-C3 depending on your BOM and GPIO needs.

Compliance & Documentation

• Electrical ratings: 3.0–3.6 V supply; I/O up to 40 mA drive (typ), internal pull-ups/downs ≈45 kΩ.

• Reliability: Meets JEDEC test suites (HTOL, ESD HBM/CDM, latch-up, TCT, uHAST, etc.).

• Developer resources: ESP-IDF Programming Guide, hardware design guidelines, consolidated pin map, packaging drawings, and product selector are available from Espressif.